NAND
Outputs false only when both inputs are true; every other combination outputs true. It is the opposite of AND.
Diagram
Ports drawn from the source data: inputs left, outputs right, config inside.
How it's used
Structural overview — derived from this gate's ports, not
from tested behavior. Takes 2 wire inputs: Input A (bool), Input B (bool). Produces 1 output: Output (bool).
Technical details — ports, config & source
Wire inputs
Wires you feed into the gate.
| Display name | Type | Tooltip |
|---|---|---|
| Input A (bInputA) | bool | No tooltip in source |
| Input B (bInputB) | bool | No tooltip in source |
Wire outputs
Wires the gate produces.
| Display name | Type | Tooltip |
|---|---|---|
| Output (bOutput) | bool | No tooltip in source |
Source details
- Brick asset
- B_1x1_Gate_Expr_LogicalNAND
- Component class
- BrickComponentType_Expr_LogicalNAND
- Kind
- expr
- Family
- Logical
- Half size
- 5 × 5 × 2